Enables single-chip integration of power amplifiers and CMOS logic control circuitry -
Kawasaki and Tokyo, Japan, December 17, 2008 — Fujitsu Laboratories Limited and Fujitsu Microelectronics Limited today announced the development of a CMOS logic(1) process-based high-voltage transistor featuring high breakdown voltage, suitable for power amplifiers used in wireless devices. As a world's first, Fujitsu developed a 45 nanometer (45nm)-generation CMOS-based transistor capable of handling 10 V power output, thus enabling the transistor to handle high-output requirements necessary for power amplifiers used in WiMAX(2) and other high-frequency applications. The new technology makes it possible for power amplifiers to be formed on the same die as CMOS logic control circuitry to achieve single-chip integration, thereby making high-performance, low-cost power amplifiers feasible.
Details of this technology were presented at the 2008 IEEE International Electron Devices Meeting (IEDM) held from December 15 to 17 in San Francisco. (Session/Presentation: 19.1)
Background
Due to the fact that power amplifiers for wireless devices demand high power output at high frequencies, currently compound semiconductors such as gallium-arsenide (GaAs) are commonly used, mounted as a chip separate from control circuitry based on a general-purpose CMOS logic chip. If these chips' functions could be integrated onto a single chip, it would enable cost reduction of the overall module and likely speed adoption of wireless devices to be used with wireless communication standards such as WiMAX and LTE(3). Thus, there is a need for transistors that are compatible with CMOS logic process technology, and which can satisfy the requirements of power amplifiers necessary for WiMAX and other wireless communication standards.
Technological Challenges
The power output required of power amplifiers for use in high-frequency applications, such as WiMAX, exceeds the breakdown voltage of transistors used with standard CMOS logic processes. Overcoming this hurdle while remaining compatible with CMOS process technology requires an increase in the transistor's breakdown voltage, which is achieved with a structure that lowers the electric field around the drain, as electric fields can lead to transistor failure. Furthermore, structures with high breakdown voltages typically increase the transistor's on-resistance(4), making it difficult to obtain satisfactory performance at high frequencies. Therefore, any solution would need to both raise breakdown voltage and avoid increasing on-resistance.
Newly Developed Technology
Figure 1: Structure of Fujitsu's newly developed transistor
To overcome the aforementioned issues, Fujitsu developed a new transistor structure with the following key characteristics (Figure 1):
The transistor's drain is surrounded by a "lightly doped drain" (LDD) region, which overlaps with the gate. This lowers the electrical field extending horizontally to the drain, and the electrical field extending to the gate oxide layer, thereby raising the breakdown voltage.
The dopant distribution in the transistor channel follows a lateral gradient. This lowers the density of dopant on the drain side of the channel, thus limiting the increase in drain resistance, which is the main part of on-resistance. It also lowers the electrical field extending horizontally to the drain, also raising the breakdown voltage.
The typical method for raising the breakdown voltage of a CMOS transistor has been to widen the gap separating gate and drain. This new structure suppresses on-resistance effectively compared to the conventional method, without increasing the gap.
Furthermore, this new structure is believed to be highly compatible with standard transistors with 3.3 V I/O(5), since it requires only the additional steps of forming the LDD region and the custom channel region.
By using 45nm process technology to apply the new transistor's technology to standard transistors with 3.3 V I/O, Fujitsu developed the world's first transistor that raises the breakdown voltage from 6 V to 10 V. In regard to features that make the new transistor suitable for use in power amplifiers, power output of 0.6 W per gate width of 1mm (0.6 W/mm) was reached at maximum oscillation frequency of 43 GHz (Figure 2), thereby demonstrating sufficient performance for use as a power transistor in WiMAX. The new transistor also produced good results in basic reliability testing.
Fuente: http://www.fujitsu.com/global/news/pr/archives/month/2008/20081217-01.html
Nombre: Lenny Ramirez
Asignatura: EES
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